According to foreign media reports, Anthropic recently briefed investors on the progress of Claude's participation in self-developed chip design. The company's newly established chip design team, which consists of only 15 people, has already begun using Claude for engineering development and design work.

Insiders revealed that engineers from Anthropic believe that Claude can significantly reduce chip design time. By comparing the design time after using Claude with the estimated traditional development processes of large chip companies such as NVIDIA and AMD, they conclude that AI auxiliary design has an efficiency advantage.

However, this conclusion is mainly based on engineers' estimates of traditional work processes. The report does not provide independent comparative tests under the same tasks, nor does it disclose the specific amount of time saved; therefore, it is still impossible to determine by how much the complete chip development cycle can be shortened.

Anthropic announced the establishment of an internal team in August this year to develop custom chips specifically for training and operating Claude. Previously, The Information also reported that the company had discussed potential manufacturing cooperation with Samsung Electronics, but no formal production arrangements have been disclosed yet.

The actual capabilities of AI in auxiliary chip design have been referenced by external evaluations.

The Information reported in October that NVIDIA and chip design automation startup ChipAgents released a test covering the entire chip design process. The AI agent, driven by Fable 5.1 from Anthropic, performed the best in the tested system, but still only scored 16.6%.

ChipAgents indicates that this evaluation covers the entire chip design process, which is more comprehensive than assessments that only test a single stage. However, a score of 16.6% only represents the model's performance in a specific test and cannot directly correspond to the development progress of Anthropic's self-developed chips.

From a practical application perspective, AI is already capable of assisting engineers in handling time-consuming tasks, such as locating simulation errors within hundreds of pages of data, thereby helping to reduce the time required for manual searching and troubleshooting.

However, chip design involves multiple stages such as circuit design, simulation, verification, and final sign-off, and the results generated by the models still need to be checked using professional tools.

Reuters reported at the end of September that OpenAI and Synopsys, a chip design software company, announced a collaboration to develop the GPT-Synopsys model, enabling AI to use Synopsys' software tools to complete some of the design tasks from circuit description to transistor layout.

Sasin Gazi, CEO of Newthink Technology, stated that the work completed by AI will still need to be verified by traditional computing tools to ensure that the chip design can actually function. High-precision verification and final design approval are still indispensable steps.

This collaboration also reflects another development path for AI chip design: integrating large models into the existing electronic design automation software systems.

According to the commercial arrangements announced by both parties, OpenAI will pay a training subscription fee to enable the model to learn how to use NewThink Technology's tools. After the customer utilizes the relevant products, the two companies will share the revenue based on the effectiveness of the model in improving chip design.

In contrast, Anthropic currently mainly utilizes its own models to assist in the development of internal chips. It has not disclosed any plans to commercialize these design capabilities, nor has it released any products for external customers.

If it enters this market in the future, Anthropic will face existing electronic design automation software suppliers such as Cadence and NewSight Technology. The products of these companies cover the design, simulation, and testing processes before chip and electronic system manufacturing.